Digital Hardware Engineer

Post Date

Mar 21, 2025

Location

Austin,
Texas

ZIP/Postal Code

78759
US
Jul 08, 2025 Insight Global

Job Type

Contract-to-perm

Category

Software Engineering

Req #

AUS-770800

Pay Rate

$68 - $85 (hourly estimate)

Job Description

Insight Global is seeking a Digital Hardware Engineer responsible for designing, implementing, and testing VHDL for ASICs used in test and measurement products. Collaborate with cross-functional teams, including driver software engineers, to define functional requirements and develop register maps. Lead full FPGA design and validation, including logic implementation, data movement, timing analysis, and testbenches. Proactively manage design tasks, provide status updates, and address technical concerns in project meetings while ensuring documentation clarity and alignment across the team.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com.

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Required Skills & Experience

Minimum Bachelor's degree in Electrical, Computer, or Software Engineering, or a related discipline.
Minimum 7+ years relevant engineering experience in digital hardware design.
Experience using VHDL to implement synthesizable logic targeting FPGAs.
Experience with static timing analysis and writing timing constraints.
Experience using synthesis tools and achieving timing closure.
Experience writing testbenches (VHDL) and simulation models to verify logic designs.
Experience defining feature requirements in collaboration with software teams.
Familiar with common clock domain crossing methods.
Ability to adapt quickly to established custom VHDL workflow tools, VHDL coding conventions, code review policies, and code quality requirements.
Located within a commutable distance to NIs offices in Austin, TX, or willing to relocate.
Equal amount of experience in design and validation

Nice to Have Skills & Experience

Experience SystemVerilog to implement synthesizable logic targeting FPGAs.
Experience writing RTL for ASIC projects.
Experience with gate-level simulation and debug.
Experience bringing up prototype hardware.
Experience with high-speed digital design
Familiar with board level signal integrity simulation tools.
Familiar with AMD (Xilinx) FPGAs and CPLDs, as well as their design tools.
Experience collaborating with other technical disciplines such as Analog, Mechanical, and RF.

Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.