Principal Mixed Signal Design Engineer

Job Description: One of our Semiconductor clients is seeking a Principal Mixed Signal Design Engineer to lead the development of cutting-edge SerDes products for automotive applications, specifically within the GMSL (Gigabit Multimedia Serial Link) technology space. This role involves architecting and designing high-performance analog and mixed-signal circuits such as Rx equalizers, CDRs, PLLs, and Tx drivers, while providing technical leadership throughout the product lifecycle.

Key Responsibilities:
- Evaluate and Develop Architectures: Create and specify individual circuit blocks. Perform system-level analysis to develop optimal system implementations.
- Circuit Ownership: Oversee analog and mixed-signal circuits used in automotive SerDes products throughout the product development cycle.
- Design and Verification: Conduct detailed circuit design, simulations, and verification of high-performance SerDes and auxiliary circuits, including Rx equalizers, DFEs, CDR, Tx drivers, clock generation (VCO, PLL, dividers, etc.), and bias circuitry.
- Technical Leadership: Provide technical leadership for complex SerDes products.
- Layout Supervision: Supervise layout and conduct post-layout simulations.
- Documentation and Reviews: Prepare documentation and conduct design reviews.
- Lab Evaluation and Debug: Perform lab evaluation and debug.
- Cross-Functional Interaction: Collaborate with cross-functional teams to define requirements and specifications. Assist in production test development.

Compensation: $148,500 - $222,750. Exact compensation may vary based on several factors, including skills, experience, and education

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com.To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/.

Qualifications:
- MSEE or Equivalent: Master's degree in Electrical Engineering or equivalent with 10+ years of relevant experience.
- Advanced Knowledge: Expertise in high-speed SerDes circuits, including Rx equalizers, DFEs, CDR, Tx drivers, clock generation (VCO, PLL, dividers, etc.), and bias circuitry.
- Communication Skills: Clear and concise written and verbal communication skills, with team working experience and a proactive approach to problem-solving.
- Proven Track Record: Demonstrated success in designing, leading, and introducing products to the market.
- Technical Leadership: Ability to provide technical leadership across a wide range of engineering disciplines on highly complex products, processes, and projects.
- Cadence Tools Expertise: Extensive experience with and advanced knowledge of Cadence design, simulation, layout, and verification tools for analog and mixed-signal designs.
- Semiconductor Background: Solid understanding of semiconductor basics, including the device physics of CMOS transistors, diodes, MIM capacitors, integrated inductors, and implanted resistors.
- Transistor-Level Design: Strong intuitive and analytical understanding of transistor-level design, with good working knowledge of small signal and large signal CMOS device models.
- Circuit Analysis Skills: Extensive circuit analysis skills, recognizing potential problems due to model limitations, high-frequency effects, and device temperature effects.
- Lab Experience: Experience characterizing and debugging mixed-signal SoCs in a lab environment, using signal generators, oscilloscopes, BERTs, logic analyzers, and data acquisition systems.
- Package and Layout Intuition: Good intuition of package and layout parasitics, with experience in extracted simulations.

Preferred Qualifications:
- Video Protocols: Expertise in video protocols such as DisplayPort, CSI/DSI, HDMI, and PCIe.
- Behavioral Modeling: Experience with analog and digital behavioral modeling, design, and synthesis of digital control blocks and state machines.
- DSP Design: Proficiency in Matlab and design of DSP blocks, including digital filters and decimators.
- Automated Digital Design: Familiarity with automated digital design tools and processes, including Verilog, synthesis, place & route, and static timing analysis (STA).

Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.