FPGA Design Engineer

Post Date

Jul 29, 2025

Location

Camden,
New Jersey

ZIP/Postal Code

08103
US
Sep 28, 2025 Insight Global

Job Type

Contract-to-perm

Category

Designer

Req #

NNJ-795456

Pay Rate

$74 - $92 (hourly estimate)

Job Description

Overview:
Insight Global is seeking Senior FPGA Design Engineers to join one of our largest federal clients. This person will be joining a core engineering team developing FPGA solutions for defense systems. You'll design and debug FPGA architectures using protocols like Ethernet, I2C, SPI, and AXI, contributing to secure, high-performance communication products.

Key Responsibilities:
Design and implement FPGA architectures from system requirements
Develop RTL code (VHDL), run simulations, and perform timing analysis
Use advanced EDA tools (e.g., Vivado, Questa, Synplify) for design and verification
Conduct board bring-up and hardware/software integration
Support NSA certification efforts

Tools & Technologies:
Mentor Questa, UVM, CDC/RDC analysis, Synopsys tools
Xilinx, Intel, and Microchip FPGA platforms
Mature design processes across multiple vendors

Impact:
This is a high-visibility role supporting mission-critical national security programs.

We are a company committed to creating inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity employer that believes everyone matters. Qualified candidates will receive consideration for employment opportunities without regard to race, religion, sex, age, marital status, national origin, sexual orientation, citizenship status, disability, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to Human Resources Request Form. The EEOC "Know Your Rights" Poster is available here.

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Required Skills & Experience

Bachelor of Science (BS) Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)

Active Secret clearance

5-20 years of experience as a FPGA/Hardware Design Engineer

Strong Ethernet experience - Designing with Ethernet protocols

Strong experience with Xilinx FPGAs and/or Vivado
Experience implementing design in RTL (VHDL) and performing module level simulations

Nice to Have Skills & Experience

Nice to Have Skills:

Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult

Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.