Digital Implementation Engineer

Day‑to‑Day Responsibilities
• Take RTL from internal design teams and push it through the full frontend implementation flow (synthesis → DFT → STA → LEC → signoff).
• Implement and iterate SDC timing constraints to achieve timing closure for assigned partitions.
• Run synthesis, generate timing reports, perform quality checks, and prepare implementation data for backend teams.
• Partner with external PNR (Place & Route) vendors to resolve timing issues, DFT logic placement impacts, and integration concerns.
• Execute multiple rounds of design and timing improvements across all assigned partitions.
• Track and meet internal quality metrics for each iteration, ensuring final partitions meet foundry‑level signoff requirements ahead of December 2026 tapeout.
• Use Synopsys and Siemens tools to execute flow steps and validate results at each stag

A client of Insight Global is seeking a highly skilled ASIC Frontend Digital Implementation Engineer with expertise in industry‑standard Digital Implementation tools (Synopsys, Cadence, Siemens EDA). The engineer will drive frontend RTL‑to‑signoff execution, collaborating closely with internal RTL designers and external backend PNR teams. This role supports multiple 2–3M–instance partitions and contributes directly to successful tapeout for a major December 2026 deliverable.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com.To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/.

Must‑Haves
• Strong hands‑on experience with Digital Implementation tools (Synopsys DC/Formality/PrimeTime, Cadence, and/or Siemens Tessent).
• Digital synthesis and DFT insertion experience.
• Proficiency in STA, LEC, and digital signoff methodologies.
• Experience supporting backend PNR teams (timing, constraints, debug).
• Background working with advanced FinFET process nodes (e.g., TSMC12 or below).
• Ability to drive multiple 2–3M instance digital partitions through repeated implementation iterations.
• Experience writing and refining SDC timing constraints.

Plusses
• 10+ years of implementation experience (not required; <10 years considered to manage cost).
• Experience with in‑house or custom digital implementation flows.
• Prior work on complex SoC programs with cross‑functional backend/RTL interactions.
• Strong understanding of foundry signoff requirements and metrics.

Benefit packages for this role will start on the 1st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.