Participate in the layout and development of analog and mixed-signal integrated circuits.
Implement layouts from circuit schematics through to DRC and LVS checks for customer IP blocks.
Ensure project objectives, milestones, and quality requirements are met consistently.
Collaborate closely with the design team on floor-planning, power/ground arrangements, critical nets, matched devices, and top-level integration while assessing project schedules.
Work alongside the internal CAD team to refine tool flows and enhance overall layout productivity.
Utilize expertise in deep sub-micron FinFET technologies, focusing on 7nm and below, employing Cadence and Mentor design and verification tools.
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46 years of hands-on experience in the layout of high speed analog and mixed-signal integrated circuits.
Proficiency in deep sub-micron FinFET technologies, specifically at 7nm and below.
Strong knowledge of Cadence Virtuoso and Mentor Graphics Calibre. (DRC/LVS checks)
Bachelor in Electrical Engineering or revolving around computer design or a Diploma.
Excellent communication skills, with the ability to collaborate effectively with cross-functional teams.
Strong problem-solving skills, attention to detail, and a commitment to meeting project deadlines.
Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.