Digital Verification Engineer

Day‑to‑Day Responsibilities
• Support the DV team in verifying DisplayPort, HDMI, USB, and other interface IP blocks.
• Collaborate with design and architecture teams to build and refine verification plans, test strategies, and coverage goals.
• Write, execute, and debug constrained‑random and directed testcases.
• Analyze coverage reports, identify gaps, and drive coverage closure.
• Implement and maintain assertions, scoreboards, and checkers for end‑to‑end data integrity.
• Participate in code reviews, regression triage, and continuous integration workflows.
• Contribute to block‑level and full‑chip verification closure, including gate‑level simulations.


Synaptics Atlanta is seeking a highly skilled ASIC Verification Engineer with strong experience in UVM‑based testbench development, debug, and functional verification. This engineer will contribute to first‑time‑right silicon for complex connectivity and interface IPs. Ideal candidates have 10+ years of experience, though Synaptics is also open to candidates with <10 years to balance project cost.
The role focuses on verifying high‑speed interface IPs such as DisplayPort, HDMI, and USB, enhancing verification infrastructure, building coverage plans, and partnering with design and architecture teams to ensure robust SoC‑level verification.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com.To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/.

Must‑Haves
• Strong experience with UVM‑based verification, including testbench development and debug.
• Hands‑on experience with high‑speed serial VIPs (e.g., DisplayPort, HDMI, USB).
• Solid understanding of SoC‑level verification flows.
• Proficiency in writing constrained‑random and directed tests.
• Demonstrated ability in debugging failures, analyzing coverage, and closing verification gaps.
• Experience with assertion‑based verification, scoreboards/checkers, and verification methodologies.

Plusses
• 10+ years of digital verification experience (not required).
• Experience supporting full‑chip verification, including Gate‑Level Simulation (GLS).
• Background working with complex interface IPs or multi‑IP SoC environments.
• Familiarity with CI‑based verification flows and regression automation.

Benefit packages for this role will start on the 1st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.