64Y-Microelectronics

MANAGER COMMUNICATION
No communication with the manager please.

*Similar to req #55840 please do not submit any candidates to this req that were submitted interviewed and rejected by the HM or CLA. Those candidates have all been reviewed and will not forward for this role at this point.

The role 100 onsite. NO EXCEPTION OR OPTION TO WORK REMOTE

Please make sure the below information is included in the notes of candidates profile for consideration or profile will be reject

Current Location:
If not local is the candidate willing to relocate at their own expense?
Is this candidate aware that this position 100 onsite?
Degree Please see comment section for min degree requirement:
MANAGER COMMUNICATION
No communication with the manager please.

Responsibilities
Title: Senior Digital ASIC/FPGA Verification Engineer
- Utilize high-level architectural documentation along with algorithm descriptions to create self-checking and reusable test benches from scratch
- Develop Functional Coverage Models and Closing Code Coverage
- Utilize UVM to create drivers monitors predictors and scoreboards

Required Qualifications

- Minimum of 15 years experience in Digital ASIC verification with at least 5 years focused on UVM
- Experience with ASIC development including architectural definition and detailed design implementation and functional verification using SystemVerilog.
- Experience with design architecture and detailed specification generation.

Preferred Skills

- Experience with hardware emulators Palladium
- Proficiency with hardware verification languages: System Verilog System Verilog Assertions
- Ability to executable test plans
- Proficiency with Object Oriented Programming Concepts: Inheritance Polymorphism etc.
- Experience developing Functional Coverage Models and Closing Code Coverage
- Proficient in scripting languages: Make Perl Python etc.
- Revision Control Systems: svn cvs git
- Proficient in Linux Environments
- Demonstrated history of 1st pass success with ASIC designs.
- Functional Safety methodology and tools

EDUCATION
All candidates MUST hold a Bachelor's degree or higher in Engineering.

Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.